Topic #: CW26-T22 · Branch: DOE · Status: Open
The U.S. Department of Energy (DOE) Office of Science supports the development of advanced electronics and data acquisition (DAQ) systems to power discovery-scale experiments in High Energy Physics (HEP) and Nuclear Physics (NP). Future experiments at facilities like the Electron-Ion Collider (EIC), upgrades resulting in the High-Luminosity Large Hadron Collider (HL-LHC), and detectors used in deep-underground rare-decay searches—will generate immense, continuous data streams from tens of thousands of channels operating in extreme environments. To process this data, microelectronics must transition toward highly integrated, low-power Systems-on-Chip (SoCs), Application-Specific Integrated Circuits (ASICs), and robust DAQ architectures. These systems must deliver sub-picosecond timing, cope with cryogenic or high-radiation environments, and perform real-time, in-pixel data compression and filtering to mitigate downstream bandwidth bottlenecks.
Posted: 10/30/2026 · Opens: 10/30/2026
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The U.S. Department of Energy (DOE) Office of Science supports the development of advanced electronics and data acquisition (DAQ) systems to power discovery-scale experiments in High Energy Physics (HEP) and Nuclear Physics (NP). Future experiments at facilities like the Electron-Ion Collider (EIC), upgrades resulting in the High-Luminosity Large Hadron Collider (HL-LHC), and detectors used in deep-underground rare-decay searches—will generate immense, continuous data streams from tens of thousands of channels operating in extreme environments. To process this data, microelectronics must transition toward highly integrated, low-power Systems-on-Chip (SoCs), Application-Specific Integrated Circuits (ASICs), and robust DAQ architectures. These systems must deliver sub-picosecond timing, cope with cryogenic or high-radiation environments, and perform real-time, in-pixel data compression and filtering to mitigate downstream bandwidth bottlenecks.
Areas of Interest To address these forward-looking challenges, this topic seeks innovative proposals in three priority areas.
a. Advanced Cryogenic and Superconducting Readout Microelectronics: focusing on ultralow-power ASICs and superconducting digital signal processors for deep-cryogenic detectors such as transition edge sensors (TES), superconducting nanowire single photon detectors (SNSPD) arrays microwave kinetic inductance detectors (MKIDs).
Goals and Metrics Proposals must address specific technical challenges and demonstrate understanding of the current state-of-the-art and offer innovative solutions to achieve or exceed targeted performance metrics: • Develop superconducting microelectronics or ASICs operating at 4 K or below, possibly operating in magnetic fields of ~1 T, with per-channel power dissipation 1 GHz with 16 bits of resolution (minimum 14 ENOB after accounting for integral and differential nonlinearities) and high channel count (64 channels). Total power dissipation of the entire Application- Specific Integrated Circuit (ASIC) must not exceed 150 mW. The chip control and data interface should be compatible with commercial auxiliary electronics. • Develop superconducting passive, heterogeneous bipolar, and active components integrated into functional circuits and systems, such as superconducting logic gates, oscillators, filters, and analog-/time-to-digital converters. Also of interest are lownoise cryogenic amplifiers (such as HEMT, SQUID, or parametric devices) optimized for the 4-8 GHz range, yielding a noise temperature -20 dBmW.
b. Radiation-Tolerant, High-Granularity Front-End ASICs: targeting Monolithic Active Pixel Sensors (MAPS) and Low Gain Avalanche Diode (LGAD) readouts with picosecond-level resolution and on-chip data processing.
Goals and Metrics Proposals must address specific technical challenges and demonstrate understanding of the current state-of-the-art and offer innovative solutions to achieve or exceed targeted performance metrics: • Develop mixed-signal ASICs for detectors such as MAPS, Skipper-in-CMOS and LGADs with integrated charge collection on high-resistivity substrates (>1 kΩ·cm), fully depleted over 5–20 μm thicknesses, and achieve charge collection within 20 ns. These ASICs should be radiation tolerant to at least 1×10^15 neq/cm where required.
c. High-Throughput Streaming DAQ and Real-Time Edge Processing: emphasizing reconfigurable filtering, on-chip machine learning engines, and high-bandwidth optical/electrical data links.
Goals and Metrics Proposals must address specific technical challenges and demonstrate understanding of the current state-of-the-art and offer innovative solutions to achieve or exceed targeted performance metrics: • Develop mixed signal, high-speed ADC converters (>12 ENOB, >500 MSps) with per-channel signal conditioning and integrated on-chip FIR/IIR filtering for baseline stabilization, crosstalk correction, common mode tracking, and adjacent-channel crosstalk correction. The inclusion of an in-channel machine learning (ML) engine capable of nonlinear filtering, pulse classification based on waveform templates, feature extraction (pulse amplitude and timing parameter estimation), and streaming readout is particularly desired to reduce raw data rates directly at the front end.
Not of Interest Proposed work is considered out of scope if it only offers incremental engineering advancements without a path toward commercialization or direct relevance to future HEP or NP programs. Development and testing of cryogenic Complementary Metal-Oxide-Semiconductor (CMOS) Application-Specific Integrated Circuits (ASICs) are excluded. Diamond-based sensor substrates are excluded. Standalone software developments or purely computational modeling efforts are also out of scope.
References 1. U.S. Department of Energy, 2023, The 2023 Long Range Plan for Nuclear Science, A New Era of Discovery, Office of Science. https://science.osti.gov/- /media/np/nsac/pdf/reports/2024/2024-NSAC-LRP-Report_Final.pdf. 2. U.S. Department of Energy, 2023, Exploring the Quantum Universe: Pathways to Innovation and Discovery in Particle Physics (aka 2023 P5 report), Office of Science. https://science.osti.gov/- /media/hep/pdf/2024/2023_P5_Report_Single_Pages.pdf. 3. Topical Workshop on Electronics for Particle Physics (TWEPP 2024), Indico, Glasgow, United Kingdom. https://indico.cern.ch/event/1381495/.
4. 12th International Meeting on Front-End Electronics (FEE 2023), Torino, Italy. https://agenda.infn.it/event/36206/. 5. Coordinating Panel for Advanced Detectors (CPAD) Workshop 2024, University of Tennessee, Knoxville (2024), https://indico.phy.ornl.gov/event/510/. 6. 23rd IEEE Real-Time Conference (RT 2022), Indico, CERN, Online (2022), https://indico.cern.ch/event/1109460/. 8. U.S. Department of Energy, DOE Basic Research Needs Study on High Energy Physics Detector Research and Development (2020), https://science.osti.gov/hep/Community- Resources/Reports. 9. Chou, A., et al., Quantum Sensors for High Energy Physics, Workshop Report, arXiv:2311.01930 (2023), https://arxiv.org/abs/2311.01930. 10. 1st International Workshop on a 2nd Detector for the EIC (2023), Brookhaven National Laboratory (2023), https://indico.bnl.gov/event/18414/. 11. Streaming Readout Workshop XIII (2025), Catania, Italy (2025), https://agenda.infn.it/event/47630/.